EE6301 Digital Logic Circuits Previous Year Question Papers


EE6301 Digital Logic Circuits Previous Year Question Papers


B.E – Electrical and Electronics Engineering, Second Year 3rd Semester EE6301 Digital Logic Circuits Previous Year Question Papers For The Regulation 2013.

(Note:  This Is The Only Site, Where You Can Download The Previous Year Anna University Question Papers In PDF Format With Good Quality And With Out Any Water Marks.

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OBJECTIVES:
  • To study various number systems, simplify the logical expressions using Boolean functions
  • To study implementation of combinational circuits
  • To design various synchronous and asynchronous circuits.
  • To introduce asynchronous sequential circuits and PLCs
  • To introduce digital simulation for development of application-oriented logic circuits.
UNIT I – NUMBER SYSTEMS AND DIGITAL LOGIC FAMILIES
Review of number systems, binary codes, error detection and correction codes (Parity and Hamming code0- Digital Logic Families, comparison of RTL, DTL, TTL, ECL and MOS families -operation, characteristics of the digital logic family.
UNIT II – COMBINATIONAL CIRCUITS
Combinational logic – representation of logic functions-SOP and POS forms, K-map representations-minimization using K maps – simplification and implementation of combinational logic – multiplexers and demultiplexers – code converters, adders, subtractors.
UNIT III – SYNCHRONOUS SEQUENTIAL CIRCUITS
Sequential logic- SR, JK, D, and T flip-flops – level triggering and edge triggering – counters – asynchronous and synchronous type – Modulo counters – Shift registers – design of synchronous sequential circuits – Moore and Mealy models- Counters, state diagram; state reduction; state assignment.
UNIT IV – ASYNCHRONOUS SEQUENTIAL CIRCUITS AND PROGRAMMABLE LOGIC DEVICES
Asynchronous sequential logic circuits-Transition table, flow table-race conditions, hazards &errors in digital circuits; analysis of asynchronous sequential logic circuits-introduction to Programmable Logic Devices: PROM – PLA –PAL.
UNIT V – VHDL
RTL Design – combinational logic – Sequential circuit – Operators – Introduction to Packages – Subprograms – Test bench. (Simulation /Tutorial Examples: adders, counters, flipflops, FSM, Multiplexers /Demultiplexers).

EE6301 Digital Logic Circuits Previous Year Question Papers for the Regulation 2013



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