EC8392 Digital Electronics Previous Year Question Paper
• To present the Digital fundamentals, Boolean algebra and its applications in digital systems
• To familiarize with the design of various combinational digital circuits using logic gates
• To introduce the analysis and design procedures for synchronous and asynchronous sequential circuits
• To explain the various semiconductor memories and related technology
• To introduce the electronic circuits involved in the making of logic gates
UNIT I DIGITAL FUNDAMENTALS
Number Systems – Decimal, Binary, Octal, Hexadecimal, 1‗s and 2‗s complements, Codes – Binary, BCD, Excess 3, Gray, Alphanumeric codes, Boolean theorems, Logic gates, Universal gates, Sum of products and product of sums, Minterms and Maxterms, Karnaugh map Minimization and Quine-McCluskey method of minimization.
UNIT II COMBINATIONAL CIRCUIT DESIGN
Design of Half and Full Adders, Half and Full Subtractors, Binary Parallel Adder – Carry look ahead Adder, BCD Adder, Multiplexer, Demultiplexer, Magnitude Comparator, Decoder, Encoder, Priority Encoder.
UNIT III SYNCHRONOUS SEQUENTIAL CIRCUITS
Flip flops – SR, JK, T, D, Master/Slave FF – operation and excitation tables, Triggering of FF, Analysis and design of clocked sequential circuits – Design – Moore/Mealy models, state minimization, state assignment, circuit implementation – Design of Counters- Ripple Counters, Ring Counters, Shift registers, Universal Shift Register
UNIT IV ASYNCHRONOUS SEQUENTIAL CIRCUITS
Stable and Unstable states, output specifications, cycles and races, state reduction, race free assignments, Hazards, Essential Hazards, Pulse mode sequential circuits, Design of Hazard free circuits.
UNIT V MEMORY DEVICES AND DIGITAL INTEGRATED CIRCUITS
Basic memory structure – ROM -PROM – EPROM – EEPROM –EAPROM, RAM – Static and dynamic RAM – Programmable Logic Devices – Programmable Logic Array (PLA) – Programmable Array Logic (PAL) – Field Programmable Gate Arrays (FPGA) – Implementation of combinational logic circuits using PLA, PAL.
Digital integrated circuits: Logic levels, propagation delay, power dissipation, fan-out and fan- in, noise margin, logic families and their characteristics-RTL, TTL, ECL, CMOS
EC8392 Digital Electronics Previous Year Question Paper for Regulation 2017
- EC8392 Digital Electronics Nov/Dec 2018 question paper download
- EC8392 Digital Electronics Apr/May 2019 Question Paper
- EC8392 Digital Electronics Nov/Dec 2019 Question Paper
- EC6302 Digital Electronics Nov/Dec 2018 Question Paper Download
- EC6302 Digital Electronics Apr/May 2018 Question Paper Download
- EC6302 Digital Electronics Nov/Dec 2017 Question Paper Download
- EC6302 Digital Electronics Apr/May 2017 Question Paper Download
- EC6302 Digital Electronics Nov/Dec 2016 Question Paper Download
- EC6302 Digital Electronics May/June 2016 Question Paper Download
- EC6302 Digital Electronics Nov/Dec 2015 Question Paper Download
- EC6302 Digital Electronics Apr/May 2015 Question Paper Download